From 69ec10d36ae688cbca3d31b9e3af146db8411879 Mon Sep 17 00:00:00 2001 From: Stefano Stabellini Date: Fri, 25 Feb 2011 11:29:45 +0000 Subject: [PATCH] x86 NMI: continue in case of PCI SERR erros Memory parity error is only valid for IBM PC-AT, newer machines use bit 7 (0x80) of 0x61 port for PCI SERR. While memory errors are usually reported via MCE. Rename the memory parity error handler to pci serr handler and print a warning and continue instead of crashing. Signed-off-by: Stefano Stabellini --- xen/arch/x86/traps.c | 21 +++++---------------- 1 file changed, 5 insertions(+), 16 deletions(-) diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c index 2908b61ca3..58fbaba82c 100644 --- a/xen/arch/x86/traps.c +++ b/xen/arch/x86/traps.c @@ -3075,23 +3075,12 @@ static void nmi_dom0_report(unsigned int reason_idx) send_guest_trap(d, 0, TRAP_nmi); } -static void mem_parity_error(struct cpu_user_regs *regs) +static void pci_serr_error(struct cpu_user_regs *regs) { - switch ( opt_nmi[0] ) - { - case 'd': /* 'dom0' */ - nmi_dom0_report(_XEN_NMIREASON_parity_error); - case 'i': /* 'ignore' */ - break; - default: /* 'fatal' */ - console_force_unlock(); - printk("\n\nNMI - MEMORY ERROR\n"); - fatal_trap(TRAP_nmi, regs); - } + console_force_unlock(); + printk("\n\nNMI - PCI system error (SERR)\n"); - outb((inb(0x61) & 0x0f) | 0x04, 0x61); /* clear-and-disable parity check */ - mdelay(1); - outb((inb(0x61) & 0x0b) | 0x00, 0x61); /* enable parity check */ + outb((inb(0x61) & 0x0f) | 0x04, 0x61); /* clear-and-disable the PCI SERR error line. */ } static void io_check_error(struct cpu_user_regs *regs) @@ -3154,7 +3143,7 @@ asmlinkage void do_nmi(struct cpu_user_regs *regs) { reason = inb(0x61); if ( reason & 0x80 ) - mem_parity_error(regs); + pci_serr_error(regs); else if ( reason & 0x40 ) io_check_error(regs); else if ( !nmi_watchdog ) -- 2.30.2